Embedded CPU Performance Engineer, Platform Architecture
Apple, Santa Clara, California +1
- Pay
- Not listed by the employer
- Work type
- Onsite
- Level
- Not stated
- Area
- Infra, platform & SRE
- Posted
- Oct 6, 2026
Check my fit
See how your résumé lines up with this role: where you match, what's missing, and lines worth rewording.
About the role
Do you get more energy from the hardest problem in the room than the easiest one? Do you want a hand in shaping the CPUs that run quietly inside nearly every Apple product from the one your iPhone relies on to capture the perfect photo, to the one guarding your Apple Watch? The CPU Platform Architecture team exists to push the limits of power-efficient CPU performance, and we hold ourselves to a standard most teams wouldn’t bother with. We’re a tight-knit group obsessed with squeezing every drop of performance out of every milliwatt, bringing together deep expertise in microarchitecture, ISA definition, performance modeling, power modeling, and workload analysis. We’re looking for a highly motivated and innovative Embedded CPU Engineer to join us. In this role, you’ll drive performance and efficiency optimization and explore architectural features for Apple’s embedded CPUs that power critical functions across Apple’s entire product line.
DESCRIPTION
As an Embedded CPU Performance Engineer, you will help define CPUs that are specifically designed for running embedded applications across iPhone, iPad, Mac, and many other Apple products. Your focus will be to seek out areas for improvement in the unique constraints of varied embedded use cases, and model solutions that balance performance, power efficiency, and area. To do this you will collaborate with experienced CPU designers in micro-architecture and RTL to assess the feasibility of ideas through modeling and refine those ideas to make them implementable. You will also correlate RTL with the CPU performance simulator to ensure that the design meets targets and that the model is accurate. The role requires the analysis of specific workloads across a wide variety of existing and new product categories to identify bottlenecks and opportunities for improvement. We collaborate as a larger CPU architecture and performance team to maintain and improve the simulation and correlation environments to enable data driven decisions and look for ways to boost the productivity of the entire team.
MINIMUM QUALIFICATIONS
BS degree Experience in CPU and SOC architecture and micro-architecture Experience with performance simulation environments Object-oriented programming skills in C/C++ Experience in a scripting language such as Perl or Python
PREFERRED QUALIFICATIONS
Expertise in CPU microarchitecture in one or more of the following areas: branch prediction, prefetching, pipeline optimization, datapath, memory hierarchy 10+ years of relevant industry experience MS or PhD in Electrical or Computer Engineering or Computer Science Understanding of common data structures and algorithms Familiarity with SIMD, vector, or accelerator architectures Understanding of: power-performance trade-offs in CPU designs, system-level power management, and low-power design techniques Comfortable in an environment of uncertainty and able to navigate through ambiguities Experience in a research-driven environment
Similar roles at other companies
CPU Power Management and Performance Architect
IntelUS, California, Folsom +1
Pay not posted
Posted 10 days ago
Senior CPU Performance Architect
IntelUS, Texas, Austin +4
Pay not posted
Posted Mar 19, 2026
Staff CPU Architecture and Performance Architect
GoogleMountain View, California +2
Pay not posted
Posted 3 days ago
checked 2 days agoLead CPU Performance Architect
GoogleAustin, Texas
Pay not posted
Posted 3 days ago
checked 2 days ago
Listed; checked 2 days ago. First seen by us 2 days ago. Being listed doesn't mean the team is actively interviewing.