Member of Technical Staff - Formal Methods
Architect Labs, Palo Alto
What you will do
As a Member of the Technical Staff - Formal Methods at Architect Labs, you'll work on the formal foundations of our chip design flow. You will own a critical layer of the stack that gives our system the rigor required to take AI-generated hardware artifacts into verified production-grade silicon. This is fundamental research applied directly to industry-grade chips, with tight feedback loops between theory and tape-out.
- Design and implement the formal specification language and intermediate representation that sits at the heart of our flow, across hardware specifications, testbench, assertions and RTL.
- Build the proof-obligation generator that emits checkable claims (entailment of assertions from spec, refinement of RTL from spec) and the toolchain that discharges them via SMT solvers, model checkers, and proof assistants as appropriate.
- Establish the soundness arguments and coverage-adequacy methodology that let us claim, with evidence, that our generated artifacts faithfully characterize the spec.
- Co-design with our verification methodology and ML research teams: your formal layer is the oracle the agent loop optimizes against, and the boundary between "provable" and "tested" is a decision you make and defend.