Senior Staff CPU Cache Subsystem Design Engineer
Google, Mountain View, California +3
About the job
Minimum qualifications
- Master’s degree in Electrical Engineering, Computer Science, or equivalent
practical experience.
- 15 years of experience in high-performance CPU design, including load-store
unit logic/RTL and L2/L3 private/shared caches including microarchitecture definition and PPA optimizations.
- Experience leading technical teams for modern processor subsystems with high
speed, lower power design.
- Experience with front-end quality checks (e.g., Lint, CDC/RDC).
Preferred qualifications
- Experience with ARM instruction set architecture.
- Experience with mobile CPU subsystem.
- Experience with mobile SOC architecture/integration.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.