Principal Test Engineer

About the role

Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission. The Compute Silicon & Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft's state-of-the-art computer chips, notably the Azure Cobalt. Our solutions provide sustainable strategic advantage to Microsoft and enable our customers to achieve more. As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the Silicon Manufacturing and Product Engineering team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure. We are looking for a Principal Test Engineer to join the team. #SCHIE #CSME

Responsibilities The candidate for this position will be expected and able to complete the following responsibilities: Responsible for product and engineering activities supporting new product development and manufacturing, with primary focus on scan (structural) test. Contribute to silicon bring-up, validation, and manufacturing readiness while working closely with cross-functional partners. Support semiconductor IC development across fabrication, manufacturing test, and packaging phases. Contribute to ATE test program development, including scan pattern integration, test method implementation, bring-up, silicon characterization, debug, and yield analysis for logic defects. Execute defined test plans and methodologies while identifying issues and escalating risks with clear technical data. Apply working knowledge of Design-for-Test (DFT), including scan architecture, ATPG, fault models, silicon fabrication processes, product qualification and reliability, and basic transistor theory. Collaborate with design, DFT, product, and manufacturing teams to support scan test readiness, coverage closure, and issue resolution. Gain exposure to product domains such as high-performance computing, AI, GPUs, and telecom, as applicable to assigned projects. Apply industry-standard DFT features, including scan (SAF/TDF), JTAG, boundary scan, and at-speed testing. Support scan test content generation, including ATPG pattern validation, pattern bring-up, and post-silicon debug activities. Understand scan fault models (e.g., stuck-at and transition faults), coverage targets, and defect screening methodologies. Utilize scan diagnosis tools to perform failure analysis, identify defect locations, and support yield improvement activities. Work with DFT teams to support simulation, emulation, and pattern verification for scan test validation.