3D Stacked DRAM Design Engineer

To strengthen leadership in the DRAM-on-Logic era through optimized DRAM die design, we are seeking talent capable of driving the co-design of 3D-stacked DRAM logic dies in close collaboration with U.S.-based customers. This strategic hiring initiative aims to enhance our global competitiveness by fostering deep engagement with key American clients, ensuring that our die design solutions are precisely aligned with their evolving technical requirements and market demands.

• Strengthen leadership in the DRAM-on-Logic era through optimized DRAM Die design and technical innovation.
• Co-design 3D-stacked DRAM Logic Dies and next-generation DRAM-on-Logic solutions with U.S.-based customers.
• Design circuits for 3D-stacked DRAM that meet internal and external specifications, including DRAM DFT implementation.
• Review specifications and define the architecture for 3D-stacked DRAM products.
• Improve design quality and yield throughout the 3D-stacked DRAM development phase.