Sr. Staff Power Performance Architect
d-Matrix, Santa Clara
About the job
Join d-Matrix and help build the future of AI inference. We’ve pioneered a memory-centric architecture that brings compute directly into memory, making AI faster, more energy efficient, and accessible on a global scale. From chips and software to rack-scale systems, our team is tackling some of AI infrastructure’s hardest challenges — and shipping breakthrough technology today. If you want to create what comes next and help make infinite inference possible, we’d love to hear from you.
Our culture is built on respect, collaboration, and direct communication. We value humility, we believe our different perspectives lead to better solutions, and we’re looking for people who are driven by execution and energized by hard problems.
Role overview
d-Matrix is looking for a Senior Staff Power Performance Architect to own pre-silicon power estimation across our next-generation AI accelerators. In this role, you will drive both RTL-level and physical-design-level power estimation, and build an architectural power estimation tool that models power from system configuration and die-level metrics for AI workloads. You will partner closely with front-end architects, DV engineers, and backend design teams to identify power activity windows, define performance monitoring requirements, and translate that analysis into hardware capability improvements and die-level design changes. This role also contributes directly to micro-architecture and RTL design, verification, and silicon bring-up, making it central to how d-Matrix balances performance and power efficiency at the silicon level.