Verification Engineer

About the role

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Job Description:

Broadcom’s ASIC Product Division (APD) is focused on enabling customers to develop products with a sustainable and substantial competitive advantage. APD does this by delivering best in class technology platforms, easy to integrate bleeding edge intellectual property, and by providing world class customer support. APD’s customers span a wide range of industries developing ASICs for largest and most complex cloud computing AI engines, supercomputers, networking, to low power and most advanced wireless solutions as examples.

Responsibilities

- Develop and execute verification plans for IP blocks at both block and system levels

- Build and maintain System Verilog/UVM-based verification environments and testbenches

- Develop Python-based behavioral models and validate designs by comparing them against RTL implementations

- Analyze simulation results, debug failures, and drive root-cause resolution

- Collaborate with design, architecture, and verification teams to ensure design quality

- Develop and maintain automation scripts and regression frameworks

- Contribute to the improvement of verification methodologies and flows

- Leverage AI-assisted tools (e.g., ChatGPT, Gemini, Cursor) to enhance productivity

Required Qualifications

- Bachelor’s degree in Electrical/Electronic Engineering, Computer Science

- 8+ years of relevant industry experience

- Strong expertise in RTL verification methodologies, including System Verilog

- Experience with ASIC verification flows and design verification methodologies

- Proficiency in UVM/OVM, Python, C/C++, and scripting

- Experience with block-level and system-level verification

- Strong debugging and problem-solving skills

- Ability to analyze and resolve complex verification trade-offs

- Excellent communication and teamwork skills

Preferred Qualifications

- Experience with firmware development or embedded C

- Knowledge of PHY layers and adaptation techniques

- Familiarity with formal verification methodologies

- Understanding of chip design flows and tools

- Knowledge of CPU, DDR, bus, network protocols, or DSP design

- Experience with AI-assisted development tools

Compensation and Benefits

The annual base salary range for this position is USD 121,900.00 To USD 195,000.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.