Technical Lead Engineer — Network Validation & Characterization
Meta, Sunnyvale, California
What you will do
Own the end-to-end validation and characterization strategy for Meta custom silicon programs in your domain, from pre-silicon emulation through post-silicon bring-up and PVT characterization Define the test plan: measurement and benchmarking methodology, instrumentation, functional and performance coverage, corner coverage across process/voltage/temperature, and pass/fail criteria Establish and document best practices for measurement rigor, accuracy, and correlation across bench, emulation, and ATE/production data Drive validation of domain feature sets (power or networking) on emulation platforms pre-silicon and on real silicon post-silicon Review schematics, power delivery networks, high-speed interface designs, and board/platform configurations with hardware and design teams; provide early design and debuggability inputs Write and review automation and analysis code that scales characterization from a single bench to many units in the lab Lead debug of complex cross-stack issues — silicon, firmware, driver, board, thermal, and fabric/switch layers — and drive root cause to closure with design, software, hardware, ODM, and vendor partners Provide technical guidance and planning for a team of validation engineers; mentor engineers and improve standards for data quality and rigor Partner with manufacturing, production, and data center teams to transfer characterization learnings into production screens and fleet health monitoring